A 8-bit 200MSmaple/s CMOS DAC

Author

Zhu, Binjie ; Song, Ziqi ; Yang, Dongxu ; Ye, Yafei ; Li, Fule

Author_Institution

Instn. of Microelectron., Tsinghua Univ., Beijing, China

fYear

2011

fDate

24-26 June 2011

Firstpage

198

Lastpage

200

Abstract

This paper introduced an 8-bit current steering CMOS digital-to-analog converter (DAC). With optimized circuit matching technique, the working frequency band varies from 10MHz to 200MHz with a spurious-free dynamic range (SFDR) attenuating from 61dB to 40dB. The measurement results of the differential nonlinearity and integral nonlinearity is 0.16LSB and 0.4LSB, respectively. The circuit is fabricated in a 0.5um single poly three-metal 5V CMOS standard process. The whole chip occupies about 2.822 mm². When the sampling rate is 200MHz, the power consumption of the DAC is about 113mW.

Keywords

CMOS integrated circuits; digital-analogue conversion; power aware computing; 8-bit 200MSmaple/s CMOS DAC; 8-bit current steering; SFDR; circuit matching technique; differential nonlinearity; digital-to-analog converter; integral nonlinearity; power consumption; spurious free dynamic range; CMOS integrated circuits; Decoding; Digital-analog conversion; Power demand; Semiconductor device measurement; Switches; Technological innovation; 0.5um; D/A; digital-analog conversion; hybrid DAC; matching;

fLanguage

English

Publisher

ieee

Conference_Titel

Anti-Counterfeiting, Security and Identification (ASID), 2011 IEEE International Conference on

Conference_Location

Xiamen

ISSN

Pending

Print_ISBN

978-1-61284-631-6

Type

conf

DOI

10.1109/ASID.2011.5967451

Filename

5967451