DocumentCode :
2501435
Title :
Advanced automatic test pattern generation techniques for path delay faults
Author :
Schulz, M.H. ; Fuchs, K. ; Fink, F.
Author_Institution :
Dept. of Electr. Eng., Tech. Univ. of Munich, West Germany
fYear :
1989
fDate :
21-23 June 1989
Firstpage :
44
Lastpage :
51
Abstract :
Based on the sophisticated techniques applied in the automatic test pattern generation system SOCRATES, the authors present the extension of SOCRATES to test generation for path delay faults. In particular, they propose a ten-valued logic and describe the corresponding implication and path sensitization procedures in detail. After discussing an extended multiple backtrace procedure, which has been developed specifically to meet the requirements of path delay testing, they conclude with a number of experimental results.<>
Keywords :
automatic testing; delays; logic testing; many-valued logics; SOCRATES; automatic test pattern generation; multiple backtrace procedure; path delay faults; path delay testing; path sensitization; ten-valued logic; Automatic test pattern generation; Circuit faults; Circuit testing; Clocks; Delay; Latches; Logic testing; System testing; Test pattern generators; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Fault-Tolerant Computing, 1989. FTCS-19. Digest of Papers., Nineteenth International Symposium on
Conference_Location :
Chicago, IL, USA
Print_ISBN :
0-8186-1959-7
Type :
conf
DOI :
10.1109/FTCS.1989.105541
Filename :
105541
Link To Document :
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