DocumentCode
2501529
Title
Fault-tolerance in a high-speed 2D convolver/correlator: Starloc
Author
Napolitano, L.M., Jr. ; Andaleon, D.D. ; Berry, K.R. ; Bryson, P.R. ; Klapp, S.R. ; Leeper, J.E. ; Redinbo, G.R.
Author_Institution
Sandia Nat. Lab., Livermore, CA, USA
fYear
1989
fDate
21-23 June 1989
Firstpage
80
Lastpage
87
Abstract
Starloc (Sandia target location computer), a special-purpose computer for locating 3D objects in a 2D image using a generalized correlation filter algorithm, is described. Starloc performs high-speed 2D convolution/correlation using commercially available floating-point processors and was designed with fault tolerance as a central feature. Its basic architecture consists of ten pipeline stages (eight for fast Fourier transform (FFT) processing and two for pixel-by-pixel weighting), arranged in a ringlike structure that includes two hot-standby stages for replacing any failed stage. Protection techniques from bit-level parity up through algorithm-based methods are used. All data paths involving memory through and within the distributed sections are covered by standard binary error-correcting codes. The floating-point processors are duplicated and surrounded by appropriate comparison circuits to detect failures while the overall system function is protected by algorithm-based checks. Dual bit-slice sequencers use internal comparators and the regular memory addressing in both FFT and weighting sections uses fault-tolerant counters. Design and fabrication of a prototype have been completed.<>
Keywords
computerised pattern recognition; computerised picture processing; fault tolerant computing; pipeline processing; special purpose computers; 2D image; FFT processing; Sandia target location computer; Starloc; algorithmic fault detection; binary error-correcting codes; bit-level parity; bit-slice sequencers; comparison circuits; fault tolerance; generalized correlation filter algorithm; high-speed 2D convolution/correlation; hot-standby; internal comparators; lock and tumble filter; pixel-by-pixel weighting; reconfigurability; regular memory addressing; special-purpose computer; ten pipeline stages; Computer architecture; Convolution; Convolvers; Correlators; Fast Fourier transforms; Fault tolerance; Filters; Pipelines; Process design; Protection;
fLanguage
English
Publisher
ieee
Conference_Titel
Fault-Tolerant Computing, 1989. FTCS-19. Digest of Papers., Nineteenth International Symposium on
Conference_Location
Chicago, IL, USA
Print_ISBN
0-8186-1959-7
Type
conf
DOI
10.1109/FTCS.1989.105547
Filename
105547
Link To Document