Title :
A fast timing verification method based on the independence of units
Author :
Yoneda, T. ; Nakade, K. ; Tohma, Y.
Author_Institution :
Tokyo Inst. of Technol., Japan
Abstract :
A novel timing verification method is presented. A system is divided into units, and the behavior of each unit is described by the internal state transitions and the occurrence of events. The analysis method reveals all possible system behavior, ignoring the timing relations between events that occur at different units. The results of an example (bus access protocol for the PROWAY system) for the timing verification of larger systems show that the method is much faster and needs much less memory region than the method based on timed Petri nets.<>
Keywords :
Petri nets; fault tolerant computing; local area networks; protocols; real-time systems; LAN; PROWAY system; bus access protocol; internal state transitions; real time systems; system behavior; timed Petri nets; timing properties; timing verification method; Circuit analysis; Circuit synthesis; Communication networks; Fires; Logic; Petri nets; Protocols; Real time systems; Safety; Timing;
Conference_Titel :
Fault-Tolerant Computing, 1989. FTCS-19. Digest of Papers., Nineteenth International Symposium on
Conference_Location :
Chicago, IL, USA
Print_ISBN :
0-8186-1959-7
DOI :
10.1109/FTCS.1989.105556