DocumentCode
2502251
Title
Approaches for the repair of VLSI/WSI RRAMs by row/column deletion
Author
Lombardi, F. ; Huang, W.K.
Author_Institution
Dept. of Comput. Sci., Texas A&M Univ., College station, TX, USA
fYear
1988
fDate
27-30 June 1988
Firstpage
342
Lastpage
347
Abstract
The authors present two approaches for the repair of large random access memory (RAM) in which redundant rows and columns have been added as spares. These devices, referred to as redundant RAMs, are repaired to achieve acceptable yields at production time. The first approach, namely, the faulty-line-covering technique, is a refinement of the fault-driven approach. This approach finds the optimal repair-solution within a smaller number of iterations than the fault-driven algorithm. Simulation results show that the faulty-line-covering technique will execute much faster under all fault distributions. The second approach uses a heuristic criterion in the generation of the repair-solution. This heuristic criterion permits a very fast repair. The criterion is based on the calculation of efficient coefficients for the rows and columns of the memory. Two techniques for coefficient selection are proposed.<>
Keywords
VLSI; fault location; integrated circuit testing; integrated memory circuits; random-access storage; redundancy; fault-driven algorithm; faulty-line-covering technique; heuristic criterion; redundant RAMs; row/column deletion; yield enhancement; Bipartite graph; Computer science; Costs; Counting circuits; Manufacturing; Random access memory; Read-write memory; Redundancy; Very large scale integration; Wafer scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Fault-Tolerant Computing, 1988. FTCS-18, Digest of Papers., Eighteenth International Symposium on
Conference_Location
Tokyo, Japan
Print_ISBN
0-8186-0867-6
Type
conf
DOI
10.1109/FTCS.1988.5341
Filename
5341
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