DocumentCode
2502457
Title
Process variability-aware proactive reconfiguration technique for mitigating aging effects in nano scale SRAM lifetime
Author
Pouyan, Peyman ; Amat, Esteve ; Rubio, Antonio
Author_Institution
Dept. of Electron. Eng., Univ. Politec. de Catalunya, Barcelona, Spain
fYear
2012
fDate
23-25 April 2012
Firstpage
240
Lastpage
245
Abstract
Process variations and device aging have a significant impact on the reliability and performance of nano scale integrated circuits. Proactive reconfiguration is an emerging technique to extend the lifetime of embedded SRAM memories. This work introduces a novel version that modifies and enhances the advantages of this method by considering the process variability impact on the memory components. Our results show between 30% and 45% SRAM lifetime increases over the existing proactive reconfiguration technique and between 1.7X and ~10X improvement over the non-proactive reconfiguration.
Keywords
SRAM chips; ageing; integrated circuit reliability; nanoelectronics; device aging effects; embedded SRAM memories; nanoscale SRAM lifetime; nanoscale integrated circuits; process variability aware proactive reconfiguration technique; reliability; Aging; Degradation; Memory management; Random access memory; Reliability; Round robin; Stress; BTI Aging; Proactive Reconfiguration; Process Variation; Redundancy; SRAM;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium (VTS), 2012 IEEE 30th
Conference_Location
Hyatt Maui, HI
ISSN
1093-0167
Print_ISBN
978-1-4673-1073-4
Type
conf
DOI
10.1109/VTS.2012.6231060
Filename
6231060
Link To Document