Title :
Hardware assisted recovery from transient errors in redundant processing systems
Author_Institution :
Charles Stark Draper Lab., Cambridge, MA, USA
Abstract :
Presents hardware-assisted recovery techniques that detect which memory segments in the failed processor need to be restored, so that recovery can be accomplished incrementally, by only restoring segments of memory that have been corrupted. The techniques, one-shot recovery and running recovery, accomplish recovery without degrading real-time control functions. The efficiency of the recovery algorithms depends on the supposition that only small changes in memory occur from iteration to iteration, and this is demonstrated from experimental data on two test algorithms. The author evaluates the applicability of this technique as applied to an Autoland simulation of a 737 aircraft and a simulated annealing planning algorithm.<>
Keywords :
aerospace simulation; fault tolerant computing; optimisation; redundancy; system recovery; transients; 737 aircraft; Autoland simulation; efficiency; failed processor; hardware-assisted recovery techniques; incremental recovery; iteration; memory corruption; memory segment restoration; one-shot recovery; real-time control functions; redundant processing systems; running recovery; simulated annealing planning algorithm; transient errors; Aircraft; Degradation; Delay; Fault tolerance; Fault tolerant systems; Hardware; Laboratories; Maintenance; Real time systems; Voting;
Conference_Titel :
Fault-Tolerant Computing, 1989. FTCS-19. Digest of Papers., Nineteenth International Symposium on
Conference_Location :
Chicago, IL, USA
Print_ISBN :
0-8186-1959-7
DOI :
10.1109/FTCS.1989.105628