DocumentCode
2502753
Title
A SAR ADC missing-decision level detection and removal technique
Author
Huang, Jiun-Lang ; Huang, X.-L. ; Chou, Y.-F. ; Kwai, D.-M.
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear
2012
fDate
23-25 April 2012
Firstpage
31
Lastpage
36
Abstract
Capacitor mismatch is the linearity limiter of charge redistribution SAR ADCs. This paper aims at detecting and removing the mismatch induced missing-decision levels (MDLs), i.e., large positive DNLs; these errors lead to information loss that cannot be recovered by external calibration. A switched-capacitor based approach is proposed to avoid DC currents and reduce design overhead; the hardware modification also supports comparator offset compensation to improve calibration quality. Simulation results show that the proposed technique effectively improves the SAR ADC linearity in the presence of capacitor mismatch and comparator offset.
Keywords
analogue-digital conversion; calibration; comparators (circuits); switched capacitor networks; synthetic aperture radar; SAR ADC missing decision level detection; calibration quality; capacitor mismatch; charge redistribution; comparator offset compensation; design overhead; external calibration; hardware modification; information loss; linearity limiter; missing decision level removal; switched capacitor based approach; Accuracy; Calibration; Capacitors; Linearity; Noise; Power demand; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium (VTS), 2012 IEEE 30th
Conference_Location
Hyatt Maui, HI
ISSN
1093-0167
Print_ISBN
978-1-4673-1073-4
Type
conf
DOI
10.1109/VTS.2012.6231076
Filename
6231076
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