DocumentCode
2504522
Title
Refining algorithm mappings for linear systolic arrays
Author
Varadarajan, Ravi ; Ravichandran, Bhavani
Author_Institution
Florida Univ., Gainesville, FL, USA
fYear
1991
fDate
30 Apr-2 May 1991
Firstpage
151
Lastpage
154
Abstract
Nested FOR loop algorithms are the most common applications of systolic arrays. All the techniques for mapping nested FOR loops onto systolic arrays have the `curse of dimensionality´. The authors propose the approach of first finding coarse-grained mappings that are easier to determine and then refining these mappings through some simple transformations, to obtain efficient fine-grained mappings. The authors propose three transformation techniques that can derive efficient fine-grained mappings for linear systolic arrays. These techniques can be used to derive easily efficient mappings for some commonly known algorithms
Keywords
parallel algorithms; systolic arrays; execution time; fine-grained mappings; inner level iterations; innermost iterations; linear systolic arrays; nested FOR loops; processor utilization; transformation techniques; Buffer storage; Delay; Ear; Input variables; Systolic arrays; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Processing Symposium, 1991. Proceedings., Fifth International
Conference_Location
Anaheim, CA
Print_ISBN
0-8186-9167-0
Type
conf
DOI
10.1109/IPPS.1991.153771
Filename
153771
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