Title :
SPICE models for power MOSFETs: an update
Author :
Yee, H.P. ; Lauritzen, Peter O.
Author_Institution :
Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
Abstract :
Five existing power MOSFET models intended for use with SPICE simulations are reviewed and compared. Methods used for simulating the gate-drain capacitance are evaluated. The internal JFET employed in two of the models is found to be usually unnecessary. A simple two-value capacitance model is recommended. The performance of this model is demonstrated with data obtained from 200 kHz forward converter
Keywords :
digital simulation; electronic engineering computing; insulated gate field effect transistors; semiconductor device models; 200 kHz; SPICE models; forward converter; gate-drain capacitance; internal JFET; power MOSFET models; Diodes; Low voltage; MOSFETs; Parasitic capacitance; Polynomials; SPICE; Shape; Switches; Transconductance; Virtual manufacturing;
Conference_Titel :
Applied Power Electronics Conference and Exposition, 1988. APEC '88. Conference Proceedings 1988., Third Annual IEEE
Conference_Location :
New Orleans, LA
DOI :
10.1109/APEC.1988.10575
