Analysis of parallel mixed-mode simulation algorithms

Author

Chamberlain, Roger D. ; Franklin, Mark A.

Author_Institution

Comput. & Commun. Res. Center, Washington Univ., St. Louis, MO, USA

fYear

1991

fDate

30 Apr-2 May 1991

Firstpage

155

Lastpage

160

Abstract

This paper presents a performance analysis of several parallel algorithms for the mixed-mode simulation of digital systems. The performance model is an architectural simulation of the parallel algorithms running on a hypercube multiprocessor. Workload data is collected from a uniprocessor-based mixed-mode simulator on several benchmark circuits, and two distinct circuit partitioning algorithms are considered. The results indicate that the performance of the parallel simulations is highly circuit dependent, in some cases performing worse than a uniprocessor and in others approaching optimal performance

Keywords

circuit analysis computing; digital simulation; logic CAD; parallel algorithms; performance evaluation; benchmark circuits; circuit partitioning algorithms; circuit simulation; hypercube multiprocessor; logic simulation; message passing distributed-memory multiprocessor; mixed-mode simulation; parallel algorithms; parallel mixed-mode simulation algorithms; parallel simulations; performance analysis; performance model; uniprocessor-based mixed-mode simulator; Algorithm design and analysis; Analytical models; Circuit simulation; Computational modeling; Digital systems; Discrete event simulation; Hypercubes; Parallel algorithms; Performance analysis; Predictive models;

fLanguage

English

Publisher

ieee

Conference_Titel

Parallel Processing Symposium, 1991. Proceedings., Fifth International

Conference_Location

Anaheim, CA

Print_ISBN

0-8186-9167-0

Type

conf

DOI

10.1109/IPPS.1991.153772

Filename

153772