• DocumentCode
    2506046
  • Title

    A new circuit model for power plane system considering decoupling capacitances in multi-layer digital applications

  • Author

    Kim, Yong-Ju ; Kang, Jong-Ho ; Park, KunWoo-park ; Wee, Jae-Kyung ; Yoon, Han-Sub ; Lee, Dong-Ju ; Kim, Yong-Tak ; Kee, Jung-Sik

  • Author_Institution
    Application Production Team, Hynix Inc., Kyoungki-do, South Korea
  • fYear
    2002
  • fDate
    21-23 Oct. 2002
  • Firstpage
    187
  • Lastpage
    190
  • Abstract
    In this paper, a newly devised model for fast design of power-ground planes including decoupling capacitors has been proposed, which simplifies the inductance and resistance nets extracted from n-port z-parameters of the power-ground plane system to a lumped circuit model. The z-parameters at all nodes are obtained via a calculated inverse matrix of the node admittance matrix. The node admittance matrix is derived from I-V equations on an equivalent circuit of power plane grids with the n/spl times/m array of square unit cells. Through this work, the power-ground plane net system is abbreviated to some lumped T-circuit circuit parameters. The proposed modeling technique shows that an optimization of ground-power planes in as well frequency domain as time-domain is easily and fast obtained without supporting extra tools. Also, the proposed model is verified through comparison with results of the power plane circuit by using unit cell array composed of RLGC elements.
  • Keywords
    RLC circuits; capacitors; circuit analysis computing; electric current; electric resistance; equivalent circuits; inductance; integrated circuit packaging; lumped parameter networks; matrix inversion; power supply circuits; printed circuit design; I-V equations; RLGC elements-based unit cell array; circuit model; decoupling capacitors; equivalent circuit; frequency domain optimization; inductance nets; inverse matrix; lumped T-circuit circuit parameters; lumped circuit model; multi-layer digital applications; n-port z-parameters; node admittance matrix; power plane grids; power plane system; power-ground plane design model; power-ground plane net system; resistance nets; time-domain optimization; Admittance; Capacitance; Capacitors; Conductors; Digital systems; Equations; Equivalent circuits; Frequency; Power system modeling; Transmission line matrix methods;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical Performance of Electronic Packaging, 2002 IEEE 11th Topical Meeting on
  • Conference_Location
    Monterey, CA, USA
  • Print_ISBN
    0-7803-7451-7
  • Type

    conf

  • DOI
    10.1109/EPEP.2002.1057912
  • Filename
    1057912