DocumentCode :
2506098
Title :
Gate-level current waveform simulation of CMOS integrated circuits
Author :
Bogliolo, Alessandro ; Benini, Luca ; Michel, Giovanni De ; Riccò, Bruno
Author_Institution :
CSL, Stanford Univ., CA, USA
fYear :
1996
fDate :
12-14 Aug 1996
Firstpage :
109
Lastpage :
112
Abstract :
We present a new gate-level approach to current simulation. We use a symbolic model of current pulses that takes accurately into account the dependence on the switching conditions. We then construct current waveforms during event-driven logic simulation by means of pulse composition. We obtain satisfying accuracy on time-domain current waveforms and on peak current estimates, while maintaining performance comparable with traditional gate-level simulation
Keywords :
CMOS logic circuits; circuit analysis computing; discrete event simulation; integrated circuit modelling; logic CAD; logic design; waveform analysis; CMOS integrated circuit; event-driven logic simulation; gate-level current waveform simulation; pulse composition; switching; symbolic model; CMOS logic circuits; Circuit simulation; Computational modeling; Current supplies; Discrete event simulation; Libraries; Power system reliability; Probability; Semiconductor device modeling; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Low Power Electronics and Design, 1996., International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-3571-6
Type :
conf
DOI :
10.1109/LPE.1996.547489
Filename :
547489
Link To Document :
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