Using queueing networks to evaluate performance in multiprocessor systems with cache memories

Author

Pont, A. ; Gil, J.A. ; Serrano, J.J.

Author_Institution

Dept. de Ingenieria de Sistemas Computadores y Autom., Valencia Univ., Spain

fYear

1994

fDate

12-14 Apr 1994

Firstpage

321

Abstract

The paper presents an analysis and evaluation using queueing networks of two multiprocessor architectures that use different solutions to maintain cache coherence. The traditional multiprocessor architecture is modeled in order to compare the performance of different snoopy cache protocols and some software schemes. In a second step another multiprocessor configuration that does not need cache protocols is modeled using the same techniques. A flexible abstract model of reference patterns is used for the workload

Keywords

cache storage; memory protocols; performance evaluation; queueing theory; shared memory systems; cache coherence; cache memories; multiprocessor architectures; multiprocessor configuration; multiprocessor systems; performance; queueing networks; reference patterns; snoopy cache protocols; software schemes; workload; Cache memory; Coherence; Computer architecture; Gas insulated transmission lines; Intelligent networks; Memory architecture; Multiprocessing systems; Protocols; Queueing analysis; Traffic control;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrotechnical Conference, 1994. Proceedings., 7th Mediterranean

Conference_Location

Antalya

Print_ISBN

0-7803-1772-6

Type

conf

DOI

10.1109/MELCON.1994.381089

Filename

381089