FPGA synthesis using Look-Up Table and Multiplexor Based architectures

In Application Specific Integrated Circuit (ASIC) realizations, Field-Programmable Gate Arrays (FPGA´s) play an increasingly important role; their costs go down every year, and relevant development tools improve rapidly. For fast and efficient designs, logic synthesis and technology mapping are crucial, as well as the quality of the target FPGA architecture. In this paper we consider two of the most interesting and popular classes of FPGA´s, Look-Up Table and Multiplexor Based, and we present experimental results obtained synthesizing several to-date benchmark circuits using commercial FPGA´s of these two classes. Our purpose is to provide ASIC designers with a criterion which might help in choosing the most appropriate FPGA architecture for the implementation of the circuit under development