DocumentCode
2507997
Title
Omnipotent and mortal training of a nanocell model to emulate the functionality of a logic gate
Author
Jha, Pankaj Kumar ; Sahula, Vineet
Author_Institution
Dept. of Electr. Eng., IIT Hyderabad, Hyderabad, India
fYear
2010
fDate
17-19 Dec. 2010
Firstpage
1
Lastpage
6
Abstract
Various unavoidable constraints (viz. physical, technical and financial) curtail the possibility of achieving continuous improvement in the computing capabilities through scaling down of devices using the conventional silicon technology. Molecular electronics aims to use the bottom-up approach to build nanoscale devices from basic molecular unit and promises unforeseen levels of computing per dollar-watt-cm2. The programmability feature of molecules is exploited to circumvent the problem of addressability. The nanocell concept is predicated on the belief that a random distribution of self-assembled molecules can be programmed to perform a specific logic function. In this paper we present a novel approach to demonstrate plausibility of the idea of “creating functionality from disorder”. The experimental results vindicate the plausibility of training a nanocell to perform a logic operation. A negative differential resistance (NDR) circuit has been designed to emulate the Λ-type I-V characteristics of the molecular switches connected between any pair of nodes in the actual nanocell. A nanocell model is then constructed taking instances of this NDR circuit. As a primary exploration of the nanocell concept the omnipotent programming was considered. The results from HSPICE simulations are then fed to the genetic algorithm(GA) solver in MATLAB to provide us with the optimized configuration(or a combination of switch states) of the NDR circuits for which the nanocell model yields the functionality of one or multiple target logic devices. Finally mortal programming is also accomplished. The GA solver is used again to provide us with the voltages which ought to be applied on each of the exterior nodes (apart from the input and output nodes) of the nanocell to yield a response resembling a NAND gate.
Keywords
SPICE; genetic algorithms; logic gates; molecular electronics; nanoelectronics; self-assembly; Λ-type I-V characteristics; HSPICE simulations; MATLAB; NAND gate; bottom-up approach; genetic algorithm solver; logic gate functionality; logic operation; molecular electronics; molecular switches; mortal programming; mortal training; nanocell model; nanoscale devices; negative differential resistance circuit; programmability; self-assembled molecules; Gallium; Integrated circuit modeling; Logic gates; Nanoscale devices; Programming; Switches; Training; Beyond CMOS; genetic algorithm; molecular electronics; mortal; nanocell; negative differential resistance; omnipotent; programmability;
fLanguage
English
Publisher
ieee
Conference_Titel
India Conference (INDICON), 2010 Annual IEEE
Conference_Location
Kolkata
Print_ISBN
978-1-4244-9072-1
Type
conf
DOI
10.1109/INDCON.2010.5712699
Filename
5712699
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