Performance and hot-carrier reliability of deep-submicrometer CMOS

Author

Chan, T.Y. ; Gaw, H.

Author_Institution

Intel Corp., Santa Clara, CA, USA

fYear

1989

fDate

3-6 Dec. 1989

Firstpage

71

Lastpage

74

Abstract

Results of a comprehensive study of the performance and hot-carrier reliability of CMOS devices with channel length ranging from submicrometer to deep-submicrometer are presented. It is found that the advantage of n-MOSFETs over p-MOSFETs in driving capability diminishes with scaled device dimensions. The saturation transconductance of deep-submicron MOSFETs degrades even at moderate gate bias because of the high field effect. When using V/sub CC//I/sub DSAT/ as the measure for gate delay, the degradation in gate delay caused by lowering the power supply voltage is found to be less significant as device dimension is scaled down to 0.1 mu m. The hot-carrier generation and hot-carrier-induced device degradation of deep-submicron CMOS are extensively investigated.<>

Keywords

CMOS integrated circuits; VLSI; circuit reliability; hot carriers; insulated gate field effect transistors; 0.1 micron; deep-submicrometer CMOS; driving capability; gate bias; high field effect; hot-carrier generation; hot-carrier reliability; hot-carrier-induced device degradation; n-MOSFETs; p-MOSFETs; power supply voltage; saturation transconductance; scaled device dimensions; CMOS technology; Charge carrier processes; Degradation; Delay; Hot carriers; MOS devices; MOSFET circuits; Power MOSFET; Power supplies; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1989. IEDM '89. Technical Digest., International

Conference_Location

Washington, DC, USA

ISSN

0163-1918

Print_ISBN

0-7803-0817-4

Type

conf

DOI

10.1109/IEDM.1989.74230

Filename

74230