Title :
Survey of Dynamically Reconfigurable Network-on-Chip
Author_Institution :
Coll. of Inf. Eng., Shanghai Maritime Univ., Shanghai, China
Abstract :
As a promising communication infrastructure of future large scale SoC, NoC is inherently suitable to the dynamic reconfiguration technology. The combination of NoC and DR will lead a new era of computing platform. This paper presents a survey of DRNoC, discusses the current approaches and open issues organized by three aspects: the hardware architecture, the routing protocol, and the reconfiguration mode.
Keywords :
network-on-chip; routing protocols; DRNoC; dynamically reconfigurable network-on-chip; hardware architecture; reconfiguration mode; routing protocol; Computer architecture; Copper; Field programmable gate arrays; Hardware; Routing; Routing protocols; Switches; Xilinx FPGA; dynamic reconfiguration; network-on-chip;
Conference_Titel :
Future Computer Sciences and Application (ICFCSA), 2011 International Conference on
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4577-0317-1
DOI :
10.1109/ICFCSA.2011.52
