• DocumentCode
    2509243
  • Title

    Automated architectural optimization of digital FIR filters

  • Author

    Mehler, Ronald W. ; Zhou, Dian

  • Author_Institution
    Dept. of Electr. Eng., Texas Univ., Dallas, TX, USA
  • fYear
    2004
  • fDate
    2004
  • Firstpage
    177
  • Lastpage
    182
  • Abstract
    Using a newly developed fine-grained architectural synthesizer for digital finite impulse response (FIR) filters, the authors present a near-optimal strategy for coefficient manipulation that runs linearly with filter length. The synthesizer operates at a high level of abstraction, balancing speed, area and power goals to generate a circuit optimized for specified parameters. Experimental results show that it is highly competitive with the best efforts of human designers and other automated procedures.
  • Keywords
    FIR filters; circuit optimisation; digital filters; automated architectural optimization; circuit optimization; digital FIR filters; digital finite impulse response filters; filter length; fine grained architectural synthesizer; Arithmetic; Circuits; Design optimization; Digital filters; Finite impulse response filter; Hardware design languages; Humans; Power generation; Product design; Synthesizers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 2004. Proceedings. 17th International Conference on
  • Print_ISBN
    0-7695-2072-3
  • Type

    conf

  • DOI
    10.1109/ICVD.2004.1260921
  • Filename
    1260921