Title :
Novel triple-threshold-voltage eight-transistor SRAM circuit with enhanced overall electrical quality
Author :
Zhu, Hong ; Kursun, Volkan
Author_Institution :
Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, China
Abstract :
Data stability is a primary concern in today´s high performance memory circuits with deeply scaled transistors and power supply voltages. Recently proposed eight-transistor (8T) Static Random Access Memory (SRAM) cells offer enhanced data stability as compared to the conventional six-transistor (6T) SRAM cells by isolating the bitlines from data storage nodes during a read operation. Novel multi-threshold-voltage (multi-Vt) eight-transistor SRAM cells with enhanced data stability and superior overall electrical quality characteristics are presented in this paper. The design tradeoffs of 8T multi-Vt SRAM cells are explored with a TSMC 65nm CMOS technology that provides a rich set of device threshold voltage options. The best triple-threshold-voltage 8T memory cell offers up to 7.3X and 3.2X higher overall electrical quality as compared to previously published single-threshold-voltage and dual-threshold-voltage 8T SRAM cells, respectively.
Keywords :
SRAM chips; low-power electronics; data stability; data storage node; deeply scaled transistor; electrical quality characteristics; high performance memory circuit; multithreshold-voltage eight-transistor SRAM cell; power supply voltage; read operation; size 65 nm; static random access memory cell; triple-threshold-voltage eight-transistor SRAM circuit; Arrays; CMOS integrated circuits; CMOS technology; Delay; Power demand; Random access memory; Transistors; battery lifetime; data stability; energy efficiency; leakage power consumption; memory integration density; multi-threshold; operation speed; write margin;
Conference_Titel :
Faible Tension Faible Consommation (FTFC), 2012 IEEE
Conference_Location :
Paris
Print_ISBN :
978-1-4673-0822-9
DOI :
10.1109/FTFC.2012.6231725
