DocumentCode :
2509466
Title :
The Design and Implementation of Adaptive Reconfigurable Computing Array
Author :
Wu, Binbin ; Yan, Like ; Feng, Degui ; Chen, Tianzhou
Author_Institution :
Coll. of Comput. Sci., Zhejiang Univ., Hangzhou, China
fYear :
2009
fDate :
25-27 Sept. 2009
Firstpage :
245
Lastpage :
250
Abstract :
More and more reconfigurable devices have been used to accelerate specific computation in traditional computing systems. But isolate reconfigurable system has some shortcomings such as limited computation ability, low utilization of reconfigurable devices. In this paper, a networked adaptive array of reconfigurable computing nodes was proposed, which is composed of host and reconfigurable devices. Via sharing reconfigurable resources among nodes in the system, the ability of computation of one node is enhanced and the utilization ratio of reconfigurable resources is increased. The experiment result shows that about 19.5%-48.2% execution time could be reduced by using 2-5 nodes in the array comparing with a single node for heavy workload.
Keywords :
field programmable gate arrays; NeTFPGA; adaptive reconfigurable computing array; networked adaptive array; Acceleration; Adaptive arrays; Adaptive systems; Computer architecture; Computer science; Educational institutions; Embedded computing; Field programmable gate arrays; Hardware; Multicore processing; NetFPGA; adaptive array reconfigurable computing; dynamic reconfiguration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Scalable Computing and Communications; Eighth International Conference on Embedded Computing, 2009. SCALCOM-EMBEDDEDCOM'09. International Conference on
Conference_Location :
Dalian
Print_ISBN :
978-0-7695-3825-9
Type :
conf
DOI :
10.1109/EmbeddedCom-ScalCom.2009.51
Filename :
5341520
Link To Document :
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