Impact of gate stack configuration onto the rf/analog performance of ISE MOSFET

Author

Kaur, Ravneet ; Chaujar, Rishu ; Saxena, Manoj ; Gupta, R.S.

Author_Institution

Dept. of Electron. Sci., Univ. of Delhi, New Delhi

fYear

2008

fDate

21-24 Nov. 2008

Firstpage

686

Lastpage

688

Abstract

In this paper, the impact of gate stack configuration onto the RF/analog and large signal linearity characteristics of insulated shallow extension (ISE) MOSFET is explored. The key factors affecting the device performance and the physics behind it are also scrutinized. The analog performance metrics- g_m/i_ds, r_out, v_ea (early voltage) & g_m/g_d gain and device linearity metrics-vip₂ & vip₃ and intermodulation distortion-imd3 of the said device have been studied facilitating the selection of bias point for improved RF/analog performance.

Keywords

MOSFET; intermodulation distortion; semiconductor device measurement; ISE MOSFET; RF/analog performance; analog performance metrics; gate stack configuration; insulated shallow extension; intermodulation distortion; signal linear characteristics; DH-HEMTs; Dielectric devices; Intermodulation distortion; Laboratories; Linearity; MOSFET circuits; Microwave devices; Radio frequency; Roads; Semiconductor devices; Device Simulation; Dielectric pocket; Gate stack; ISE;

fLanguage

English

Publisher

ieee

Conference_Titel

Recent Advances in Microwave Theory and Applications, 2008. MICROWAVE 2008. International Conference on

Conference_Location

Jaipur

Print_ISBN

978-1-4244-2690-4

Electronic_ISBN

978-1-4244-2691-1

Type

conf

DOI

10.1109/AMTA.2008.4762992

Filename

4762992