Title :
Easily testable realization of GRM and ESOP networks for detecting stuck-at and bridging faults
Author :
Rahaman, Hafizur ; Das, Debesh K. ; Bhattacharya, Bhargab B.
Author_Institution :
Inf. Technol. Dept., B.E. Coll., Howrah, India
Abstract :
A testable realization of Generalized Reed-Muller (GRM) or EXOR Sum-of-Products (ESOP) expression has been proposed that admits a combined universal test set of size (2n+6) for detection of stuck-at and bridging faults. For GRM implementation, the test set detects all single stuck-at and bridging faults (both OR and AND type) and a large number of multiple bridging faults. For ESOP, a few single bridging faults may remain untested, occurrence of which can be avoided by employing a design and layout technique. The test set is independent of the function and the circuit-under-test and can be stored in a ROM on chip for built-in self-test. For several benchmark circuits, the size of the test set is found to be much smaller than an ATPG-generated test set or those of the previous methods.
Keywords :
automatic test pattern generation; benchmark testing; built-in self test; fault diagnosis; logic testing; ATPG; BIST; ESOP networks; EXOR sum of products; GRM; ROM; automatic test pattern generation; benchmark circuits; built-in self test; circuit under test; exclusive OR logic; generalized Reed-Muller expression; multiple bridging faults detection; read only memory; single bridging faults; stuck-at faults detection; testable realization; universal test set; Automatic testing; Circuit faults; Circuit synthesis; Circuit testing; Design for testability; Educational institutions; Electrical fault detection; Fault detection; Information technology; Network synthesis;
Conference_Titel :
VLSI Design, 2004. Proceedings. 17th International Conference on
Print_ISBN :
0-7695-2072-3
DOI :
10.1109/ICVD.2004.1260968