DocumentCode
2510473
Title
Can SAT be used to improve sequential ATPG methods?
Author
Prasad, Mukul R. ; Hsiao, Michael S. ; Jain, Jawahar
Author_Institution
Fujitsu Labs. of America, Sunnyvale, CA, USA
fYear
2004
fDate
2004
Firstpage
585
Lastpage
590
Abstract
In this work we investigate the integration of SAT methods into a simulation-based sequential ATPG tool, STRATEGATE, with the aim of improving the state-of-the-art in sequential ATPG. We offer a detailed analysis of possible scenarios and algorithms for performing such an integration. Our preliminary investigations show that such hybrid approaches can be very promising.
Keywords
automatic test pattern generation; computability; sequential circuits; SAT method integration; automatic test pattern generation; satisfiability methods; sequential ATPG methods; Algorithm design and analysis; Automatic test pattern generation; Boolean functions; Computational modeling; Computer simulation; Data structures; Engines; Laboratories; Manufacturing; Performance analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 2004. Proceedings. 17th International Conference on
Print_ISBN
0-7695-2072-3
Type
conf
DOI
10.1109/ICVD.2004.1260982
Filename
1260982
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