DocumentCode
2510503
Title
Avoiding Determinization
Author
Kupferman, Orna
Author_Institution
Sch. of Comput. Sci. & Eng., Hebrew Univ., Jerusalem
fYear
0
fDate
0-0 0
Firstpage
243
Lastpage
254
Abstract
Automata on infinite objects are extensively used in system specification, verification, and synthesis. Applications that involve determinization of automata on infinite words have been doomed to belong to the second category. This has to do with the intricacy of Safra´s optimal determinization construction, the fact that the state space that results from determinization is awfully complex and is not amenable to optimizations and a symbolic implementation, and the fact that determinization requires the introduction of acceptance conditions that are more complex than the Buchi acceptance condition. Examples of applications that involve determinization and belong to the unfortunate second category include model checking of omega-regular properties, decidability of branching temporal logics, and synthesis and control of open systems. We offer an alternative to the standard automata-theoretic approach. The crux of our approach is avoiding determinization. Our approach goes instead via universal co-Buchi automata. Like nondeterministic automata, universal automata may have several runs on every input. However, an input is accepted if all of the runs are accepting. We show how the use of universal automata simplifies significantly known complementation constructions for automata on infinite words, known decision procedures for branching temporal logics, known synthesis algorithms, and other applications that are now based on determinization. Our algorithms are less difficult to implement and have practical advantages like being amenable to optimizations and a symbolic implementation
Keywords
automata theory; computational complexity; formal logic; formal specification; formal verification; Safra optimal determinization construction; automata determinization; automata-theoretic approach; decision procedures; infinite words; model checking; nondeterministic automata; symbolic implementation; synthesis algorithms; system specification; temporal logic; universal coBuchi automata; Automata; Automatic control; Computer science; Construction industry; Control system synthesis; Formal verification; Logic; Mathematics; Open systems; State-space methods;
fLanguage
English
Publisher
ieee
Conference_Titel
Logic in Computer Science, 2006 21st Annual IEEE Symposium on
Conference_Location
Seattle, WA
ISSN
1043-6871
Print_ISBN
0-7695-2631-4
Type
conf
DOI
10.1109/LICS.2006.15
Filename
1691235
Link To Document