Title :
A new approach to topology selection for cell-level analog circuits
Author :
Nagar, S. ; Mazhari, B.
Author_Institution :
Dept. of Electr. Eng., Indian Inst. of Technol., Kanpur, India
Abstract :
A new approach for selecting a topology from among a fixed set of alternatives for cell-level analog circuits is presented. The topology selection is based on the description of each circuit topology as a set of constraints among the specifications expressed in the form of analytical equations. The proposed topology selection methodology is illustrated using the example of CMOS current sources, voltage amplifiers and differential pair.
Keywords :
CMOS analogue integrated circuits; analogue integrated circuits; constant current sources; differential amplifiers; network topology; CMOS current sources; analytical equations; cell level analog circuits; circuit topology; complementary metal-oxide-semiconductor; differential amplifiers; topology selection; voltage amplifiers; Analog circuits; CMOS technology; Circuit topology; Design automation; Differential amplifiers; Equations; Information analysis; Mirrors; Voltage; Writing;
Conference_Titel :
VLSI Design, 2004. Proceedings. 17th International Conference on
Print_ISBN :
0-7695-2072-3
DOI :
10.1109/ICVD.2004.1260987
