Title :
A Research and Design of Ethernet Real-Time Application Bus Based on FPGA
Author :
Xu, Min ; Zhu, Wenzhang
Author_Institution :
Electron. & Electr. Eng. Dept., Xiamen Univ. of Technol., Xiamen, China
Abstract :
The design scheme of hard real-time bus CANNet based on IEEE 802.3 and CAN bus is proposed for the request of multi point high broadband information interchange in the distribution intelligent control system module interconnection. The CAN arbitration mechanism is added in the physical layer of ethernet network. Thus the CANNet bus not only has Ethernet network ,but also has the property of CAN bus compatible non-destroy formal bus arbitration and communication frame prior to race to control. The soft and hard testing platform of CANNet baset FPGA has been bulk up and the system has been tested, which verifies the feature of real-time and strong anti-interference ability of CANNet. The connection of real-time and non-real-time can be not only performed by using the uniform CANNet bus, but also used for the uniform standard interface of control module. It is of high practical value.
Keywords :
control engineering computing; distributed control; field programmable gate arrays; intelligent control; local area networks; CAN bus compatible non-destroy formal bus arbitration; Ethernet realtime application bus; FPGA; IEEE 802.3; control module; distribution intelligent control system module interconnection; hard real-time bus CANNet; multipoint high broadband information interchange; uniform standard interface; Embedded computing; Ethernet networks; Field programmable gate arrays; Aarbitration mechanism; CAN bus; Ethernet; FPGA;
Conference_Titel :
Scalable Computing and Communications; Eighth International Conference on Embedded Computing, 2009. SCALCOM-EMBEDDEDCOM'09. International Conference on
Conference_Location :
Dalian
Print_ISBN :
978-0-7695-3825-9
DOI :
10.1109/EmbeddedCom-ScalCom.2009.18