DocumentCode
2511511
Title
CMP Thread Assignment Based on Group Sharing L2 Cache
Author
Jiang, Guanjun ; Du Chen ; Wu, Binbin ; Zhao, Yi ; Tianzhou Chen ; Liu, Jingwei
Author_Institution
Coll. of Comput. Sci., Zhejiang Univ., Hangzhou, China
fYear
2009
fDate
25-27 Sept. 2009
Firstpage
298
Lastpage
303
Abstract
With the development of electric technology, uniprocessor is being substituted by CMP (chip multi processors). CMP can run multi-thread program efficiently, many researchers engage in the study of multi-thread, including extracting multi-thread from legacy single thread program and making standardization for future multi-thread program. Data communication among threads is an inevitable problem in multi-thread program, and efficient data sharing is an important aspect for program performance. But researchers focus data sharing on memory organization and relationship among threads, there is little attention for intra-processor. In this paper, we develop a thread assignment method for group sharing L2 cache architecture according to the data relationship among threads. We allocate some threads to some cores and some threads others. In our experiment, we simulates four threads with different degree data sharing and running in four cores CMP, whose cores is divided into two groups. Comparing some program execution tracks, we find that the main difference between two simulations is the hit rate of L2 cache and thread assignment brings 6.25% running time improvement. The L2 cache hit rate is 91.0% and 87.1% with thread assignment our proposed, but the L2 cache hit rate is 77.0% and 75.4% with random thread assignment. It descends 14.0% and 11.7% for each group.
Keywords
cache storage; multi-threading; chip multi processors thread assignment; data sharing; group sharing L2 cache; legacy single thread program; memory organization; multithread program; program execution tracks; program performance; random thread assignment; thread assignment method; Acceleration; Circuits; Computer science; Educational institutions; Embedded computing; Energy consumption; Frequency; Multicore processing; Standardization; Yarn; CMP; L2 Cache; Thread Assignment;
fLanguage
English
Publisher
ieee
Conference_Titel
Scalable Computing and Communications; Eighth International Conference on Embedded Computing, 2009. SCALCOM-EMBEDDEDCOM'09. International Conference on
Conference_Location
Dalian
Print_ISBN
978-0-7695-3825-9
Type
conf
DOI
10.1109/EmbeddedCom-ScalCom.2009.60
Filename
5341618
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