High-speed optoelectronics receivers in SiGe

Author

Gupta, Amit ; Levitan, Steven P. ; Selavo, Leo ; Chiarulli, Donald M.

Author_Institution

Pittsburgh Univ., PA, USA

fYear

2004

fDate

2004

Firstpage

957

Lastpage

960

Abstract

This paper focuses on the investigation of integrated CMOS and Silicon/Germanium (SiGe) devices for highspeed optical receiver circuits. In this paper, we present several competitive designs of front-end transimpedance amplifiers (TIA) for optical receiver applications using the IBM 5HP (0.5 micron) SiGe technology. This technology exhibits f_T and f_MAX of 47 GHz and 65 GHz respectively. Spectre simulations in the Cadence Affirma analog design environment are conducted for both the TIA´s and a complete receiver circuit consisting of a TIA, a cascaded multi-stage differential amplifier and a multi-stage inverting amplifier at the single supply voltage of 3.3 V. We also discuss the practicality of using SiGe based photodetectors for 1.3-1.5 μm wavelength light and the use of Neolinear´s NeoCircuit/NeoCell mixed signal design tools for optimization of the analog circuits.

Keywords

CMOS analogue integrated circuits; Ge-Si alloys; analogue integrated circuits; circuit optimisation; circuit simulation; differential amplifiers; high-speed integrated circuits; integrated optoelectronics; optical receivers; photodetectors; semiconductor devices; 0.5 micron; 1.3 to 1.5 micron; 3.3 V; 47 GHz; 65 GHz; Cadence Affirma analog design; NeoCell mixed signal design; Neolinears NeoCircuit; SiGe technology; analog circuits; cascaded multistage differential amplifier; front end transimpedance amplifiers; high speed optoelectronics receivers; integrated CMOS devices; multistage inverting amplifier; optical receiver applications; optimization; photodetectors; spectre simulation; CMOS technology; Differential amplifiers; Germanium silicon alloys; Integrated circuit technology; Optical amplifiers; Optical design; Optical receivers; Semiconductor optical amplifiers; Signal design; Silicon germanium;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, 2004. Proceedings. 17th International Conference on

Print_ISBN

0-7695-2072-3

Type

conf

DOI

10.1109/ICVD.2004.1261054

Filename

1261054