Title :
Parallel FFT implementation based on multi-core DSPs
Author :
Xue, Shanshan ; Wang, Jian ; Li, Yubai ; Peng, Qicong
Author_Institution :
Sch. of Commun. & Inf. Eng., Univ. of Electron. Sci. & Technol. of China, Chengdu, China
Abstract :
The paper proposes a new implementation platform for parallel FFT called multi-core DSPs, which uses Serial RapidIO (SRIO) to achieve DSP-to-DSP communication and utilizes Enhanced Direct Memory Access (EDMA3) to realize core-to-core communication. The simulation results show this architecture not only effectively solves the bottleneck of system interconnection, but also greatly improves executing efficiency of Fast Fourier Transform (FFT). Especially for large FFT points, this advantage is more obviously presented.
Keywords :
digital signal processing chips; fast Fourier transforms; file organisation; integrated circuit interconnections; enhanced direct memory access; fast Fourier transform; multicore DSP; parallel FFT algorithm; serial rapidIO; system interconnection; Algorithm design and analysis; Arrays; Digital signal processing; Discrete Fourier transforms; Multicore processing; Program processors; Registers;
Conference_Titel :
Computational Problem-Solving (ICCP), 2011 International Conference on
Conference_Location :
Chengdu
Print_ISBN :
978-1-4577-0602-8
Electronic_ISBN :
978-1-4577-0601-1
DOI :
10.1109/ICCPS.2011.6092292
