DocumentCode :
2512272
Title :
An architecture for motion estimation in the transform domain
Author :
Lee, J. ; Vijaykrishnan, N. ; Irwin, M.J. ; Wolf, W.
Author_Institution :
Embedded & Mobile Comput. Design Center, Pennsylvania State Univ., University Park, PA, USA
fYear :
2004
fDate :
2004
Firstpage :
1077
Lastpage :
1082
Abstract :
In this paper, a novel architecture for transform domain motion estimation is proposed. We derive a recursion equation from the algorithm and wavefront array processors are used to perform motion estimation algorithm adoptively in the transform domain according to the compression ratio. It is also shown that a higher throughput rate with the reduction of arithmetic building blocks, frame memory size and the number of memory accesses is achieved. The proposed architecture can also reconfigure to different algorithms that can be used to perform power-aware video encoding. Simulation results on video sequences of different characteristics show comparable performance of the proposed algorithm to spatial domain approaches in the aspects of PSNR and compression ratio.
Keywords :
image sequences; motion estimation; parallel architectures; recursive functions; transform coding; video coding; arithmetic building blocks; compression ratio; frame memory size; memory accesses; motion estimation algorithm; peak signal to noise ratio; recursion equation; spatial domain approaches; transform domain motion estimation; video encoding; video sequences; wavefront array processors; Computational complexity; Computer architecture; Discrete cosine transforms; Electronic mail; Frequency domain analysis; Motion estimation; PSNR; Very large scale integration; Video coding; Video compression;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2004. Proceedings. 17th International Conference on
Print_ISBN :
0-7695-2072-3
Type :
conf
DOI :
10.1109/ICVD.2004.1261072
Filename :
1261072
Link To Document :
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