Title :
Analytical modeling of accumulation layer thickness in SOI G4FET: Introducing geometric factor
Author :
Bappy, Mehedy Hasan ; Rahman Khan, M. Ziaur
Author_Institution :
Dept. of Electr. & Electron. Eng., Bangladesh Univ. of Eng. & Technol., Dhaka, Bangladesh
Abstract :
An analytical model has been developed to determine the accumulation layer thickness of an inverted back interface silicon-on-insulator (SOI) four-gate transistor (G4 - FET) by solving two dimensional Poisson´s equation. To do so a geometric factor is introduced that combines the neglected inversion effects along with the existing device physics. Moreover, this factor considers the charge redistribution due to change in bias condition in different electrodes of the device. Physically, it indicates the non-availability of space for both depleted and inverted charges. The proposed model, named as modulated model for accumulation thickness considering inversion effects is verified numerically. The model commenced here successfully correlates the effect of all four gate bias.
Keywords :
MOSFET; Poisson equation; junction gate field effect transistors; semiconductor device models; silicon-on-insulator; MOS-JFET; SOI G4FET; accumulation layer thickness analytical modeling; bias condition; charge redistribution; device physics; electrodes; gate bias; geometric factor; inverted back interface silicon-on-insulator four-gate transistor; two dimensional Poisson equation; Junctions; Logic gates; Mathematical model; Numerical models; Silicon; Simulation; Transistors; Accumulation layer thickness; G4-FET; Geometric Factor; Inversion operation;
Conference_Titel :
Electrical and Computer Engineering (ICECE), 2014 International Conference on
Conference_Location :
Dhaka
Print_ISBN :
978-1-4799-4167-4
DOI :
10.1109/ICECE.2014.7026983
