DocumentCode
251533
Title
Representation of solutions in genetic VLSI placement algorithms
Author
Zaporozhets, D.U. ; Zaruba, D.V. ; Kureichik, V.V.
Author_Institution
Coll. of Autom. & Comput. Sci., Southern Fed. Univ., Rostov-on-Don, Russia
fYear
2014
fDate
26-29 Sept. 2014
Firstpage
1
Lastpage
4
Abstract
The VLSI placement problem is presented in this article. A mechanism of representation of solutions for further genetic algorithm implementation is described. The proposed encoding algorithm is based on a placement tree and reverse Polish notation. The decoding algorithm is implemented in two stages: twinning of elements in macroblocks and calculation of real coordinates of elements. Experimental results show time-response characteristics of the proposed coding and decoding mechanisms. The time complexity of the encoding algorithm is represented by O(n) whereas the time complexity of the decoding algorithm is represented by O(n log n), where n is the number of elements.
Keywords
VLSI; computational complexity; genetic algorithms; integrated circuit design; trees (mathematics); VLSI placement problem; decoding algorithm; encoding algorithm; genetic algorithm implementation; placement tree; reverse Polish notation; time complexity; time-response characteristics; Algorithm design and analysis; Biological cells; Decoding; Educational institutions; Encoding; Genetic algorithms; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Test Symposium (EWDTS), 2014 East-West
Conference_Location
Kiev
Type
conf
DOI
10.1109/EWDTS.2014.7027053
Filename
7027053
Link To Document