DocumentCode :
251591
Title :
Dual interpolating counter architecture for atomic clock comparison
Author :
Dostal, Jiri ; Smotlacha, Vladimir
Author_Institution :
Fac. of Inf. Technol., Czech Tech. Univ. in Prague, Prague, Czech Republic
fYear :
2014
fDate :
26-29 Sept. 2014
Firstpage :
1
Lastpage :
4
Abstract :
This paper deals with an accurate time transfer and atomic clocks comparison in a geographically distant locations utilizing the optical lines. A new dual interpolating counter architecture for the clock comparison over an optical network is presented, especially utilizing dense wavelength division multiplexing (DWDM). There are described the time transfer method and the details of the interpolating counter implementation (the interpolator feed and the run time interpolator calibration). Experiences with the current embedded time interval counter design in the FPGA are presented as well.
Keywords :
atomic clocks; calibration; field programmable gate arrays; interpolation; wavelength division multiplexing; DWDM; FPGA; atomic clock; dense wavelength division multiplexing; dual interpolating counter architecture; embedded time interval counter design; optical line network utilization; run time interpolator feed calibration; time transfer method; Atomic clocks; Delay lines; Delays; Optical fiber networks; Radiation detectors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design & Test Symposium (EWDTS), 2014 East-West
Conference_Location :
Kiev
Type :
conf
DOI :
10.1109/EWDTS.2014.7027081
Filename :
7027081
Link To Document :
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