• DocumentCode
    2516516
  • Title

    A systolic algorithm for the fast computation of the connected components of a graph

  • Author

    Núñez, Fernando J. ; Valero, Mateo

  • Author_Institution
    Dept. de Arquitectura de Computadores, Univ. Politecnica de Cataluna, Barcelona, Spain
  • fYear
    1988
  • fDate
    7-9 June 1988
  • Firstpage
    2267
  • Abstract
    The authors consider the description of a systolic algorithm to solve the connected-component problem. It is executed in a ring topology with N processors, requiring O(Nlog N) time without regard to the graph´s sparsity. The algorithm-partitioning issue is also addressed, indicating how to optimally map the computations into fixed-size rings or linear arrays. The proposed algorithm leads to simple processing elements, data addressing, and control. These points make the systolic array highly implementable.<>
  • Keywords
    cellular arrays; computer architecture; multiprocessing systems; parallel algorithms; N processors; algorithm-partitioning; connected-component problem; fast computation; fixed-size rings; linear arrays; ring topology; simple processing elements; systolic algorithm; systolic array; Adaptive arrays; Data structures; Systolic arrays; Tree data structures;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1988., IEEE International Symposium on
  • Conference_Location
    Espoo, Finland
  • Type

    conf

  • DOI
    10.1109/ISCAS.1988.15396
  • Filename
    15396