Title :
0.6 mu m high speed BiCMOS technology with emitter-base self-aligned structure
Author :
Yoshimura, T. ; Yamada, S. ; Yamauchi, T. ; Shimauchi, Y. ; Inayoshi, K.
Author_Institution :
Fujitsu Ltd., Kawasaki, Japan
Abstract :
A high-speed BiCMOS technology called emitter-base self-aligned BiCMOS (ESBiC) has been developed. This process combines the polysilicon emitter-base self-aligned bipolar transistor with a 0.6- mu m-gate CMOS transistor. With this process, a 15-GHz cutoff frequency and an ECL (emitter-coupled logic) basic delay time of 60 ps at I/sub cs/=1 mA are achieved. For the BiCMOS gate, a 200-ps basic delay and a 330-ps delay time with 0.5-pF load capacitance are obtained.<>
Keywords :
BIMOS integrated circuits; bipolar transistors; integrated circuit technology; integrated logic circuits; 0.5 pF; 0.6 micron; 1 mA; 15 GHz; 60 to 330 ps; ECL; ESBiC; cutoff frequency; delay time; emitter-base self-aligned structure; high speed BiCMOS technology; load capacitance; polysilicon emitter-base self-aligned bipolar transistor; propagation delay time; BiCMOS integrated circuits; Bipolar transistors; Boron; Cutoff frequency; Delay; Electrodes; Fabrication; MOS devices; MOSFETs; Resistors;
Conference_Titel :
Electron Devices Meeting, 1989. IEDM '89. Technical Digest., International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-0817-4
DOI :
10.1109/IEDM.1989.74270
