Title :
Back-floating gate non-volatile memory
Author :
Avci, U. ; Kumar, A. ; Tiwari, S.
Author_Institution :
Appl. & Eng. Phys., Cornell Univ., Ithaca, NY, USA
Abstract :
Conventional floating-gate flash memory has scaling difficulties due to nonscaling of gate-insulator stack and inefficient hot carrier injection processes at sub-50 nm gate dimensions. Back-floating gate (BFG) flash memory structure overcomes these limitations by decoupling read and write operation and independent positioning and/or sizing of the storage element (back-floating gate) under the silicon channel. We report here the first realization and operation of back-floating gate memory together with its possible array implementation.
Keywords :
CMOS memory circuits; chemical mechanical polishing; elemental semiconductors; flash memories; random-access storage; silicon; 50 nm; Si; array implementation; back floating gate nonvolatile flash memory; decoupled read/write operations; gate insulator stack; hot carrier injection process; silicon channel; storage element sizing; sub-50 nm gate dimension; CMOS logic circuits; Fabrication; Flash memory; Hot carriers; Nonvolatile memory; Silicon; Substrate hot electron injection; Tunneling; Voltage; Wafer bonding;
Conference_Titel :
SOI Conference, 2004. Proceedings. 2004 IEEE International
Print_ISBN :
0-7803-8497-0
DOI :
10.1109/SOI.2004.1391588
