DocumentCode :
2517564
Title :
Stochastic switching circuit synthesis
Author :
Wilhelm, Daniel ; Bruck, Jehoshua
Author_Institution :
Dept. of Comput. & Neural Syst., California Inst. of Technol., Pasadena, CA
fYear :
2008
fDate :
6-11 July 2008
Firstpage :
1388
Lastpage :
1392
Abstract :
Shannon in his 1938 Masterpsilas Thesis demonstrated that any Boolean function can be realized by a switching relay circuit, leading to the development of deterministic digital logic. Here, we replace each classical switch with a probabilistic switch (pswitch). We present algorithms for synthesizing circuits closed with a desired probability, including an algorithm that generates optimal size circuits for any binary fraction. We also introduce a new duality property for series-parallel stochastic switching circuits. Finally, we construct a universal probability generator which maps deterministic inputs to arbitrary probabilistic outputs. Potential applications exist in the analysis and design of stochastic networks in biology and engineering.
Keywords :
network synthesis; relays; stochastic processes; switching circuits; Boolean function; binary fraction; deterministic digital logic; optimal size circuits; probabilistic switch; series-parallel stochastic switching circuits; stochastic networks; stochastic switching circuit synthesis; switching relay circuit; universal probability generator; Boolean functions; Circuit synthesis; Digital relays; Joining processes; Logic circuits; Probability distribution; Stochastic processes; Stochastic systems; Switches; Switching circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information Theory, 2008. ISIT 2008. IEEE International Symposium on
Conference_Location :
Toronto, ON
Print_ISBN :
978-1-4244-2256-2
Electronic_ISBN :
978-1-4244-2257-9
Type :
conf
DOI :
10.1109/ISIT.2008.4595215
Filename :
4595215
Link To Document :
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