• DocumentCode
    2517698
  • Title

    Pareto-Optimal Die Orientations for 3-D Stacking of Identical Dies

  • Author

    Deshpande, Anand ; Natarajan, Venkat ; Methani, Jai

  • Author_Institution
    Corp. Technol. Group, Intel Technol. India Pvt. Ltd., Bangalore, India
  • fYear
    2008
  • fDate
    9-12 Dec. 2008
  • Firstpage
    193
  • Lastpage
    199
  • Abstract
    3-D stacking of dies results in high device density and high device speeds. One of the major challenges in die stacking is the proper dissipation of heat generated by the dies. Each die has a non-uniform powermap, which results in one or more hotspots on the die. The thermal challenge is made even worse by possible alignment of the hotspots when dies are stacked. To mitigate this issue, it is imperative that dies are placed such that the hot spots are as far away from each other as possible. This however, results in increased wirelengths within the stack and subsequently reduced performance. Thus, designing of a 3-D die stack involves solving a multi-objective optimization problem to simultaneously minimize both the temperature and wirelength in the stack. In this paper, this optimization problem is formulated for a special case of all dies being identical to each other, which is a realistic assumption especially for memory dies. The complete Pareto-optimal solution set is obtained for this problem, and the results show that certain Pareto-optimal solutions represent a much better trade-off in thermal and electrical performances as compared to the more intuitive single-objective solutions. The results also highlight the benefits of obtaining the entire Pareto-front and not just a few Pareto-optimal solutions.
  • Keywords
    Pareto optimisation; electronics packaging; stacking; 3-D stacking; Pareto-optimal die orientations; electrical performances; multiobjective optimization; thermal performances; Design optimization; Ear; Encapsulation; Erbium; Heat engines; Mechanical engineering; Silicon; Stacking; TV; Thermal stresses;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Packaging Technology Conference, 2008. EPTC 2008. 10th
  • Conference_Location
    Singapore
  • Print_ISBN
    978-1-4244-2117-6
  • Electronic_ISBN
    978-1-4244-2118-3
  • Type

    conf

  • DOI
    10.1109/EPTC.2008.4763433
  • Filename
    4763433