DocumentCode
2518619
Title
Unified assign and schedule: a new approach to scheduling for clustered register file microarchitectures
Author
Özer, Emre ; Banerjia, Sanjeev ; Conte, Thomas M.
Author_Institution
North Carolina State Univ., Raleigh, NC, USA
fYear
1998
fDate
30 Nov-2 Dec 1998
Firstpage
308
Lastpage
315
Abstract
Recently, there has been a trend towards clustered microarchitectures to reduce the cycle time for wide issue microprocessors. In such processors, the register file and functional units are partitioned and grouped into clusters. Instruction scheduling for a clustered machine requires assignment and scheduling of operations to the clusters. In this paper, a new scheduling algorithm named unified-assign-and-schedule (UAS) is proposed for clustered, statically-scheduled architectures. UAS merges the cluster assignment and instruction scheduling phases in a natural and straightforward fashion. We compared the performance of UAS with various heuristics to the well-known Bottom-up Greedy (BUG) algorithm and to an optimal cluster scheduling algorithm, measuring the schedule lengths produced by all of the schedulers. Our results show that UAS gives better performance than the BUG algorithm and is quite close to optimal
Keywords
computer architecture; microprocessor chips; performance evaluation; processor scheduling; clustered register file microarchitectures; functional units; performance; processor scheduling; statically-scheduled architectures; unified assign and schedule; Clustering algorithms; Dynamic scheduling; Electrical capacitance tomography; Iterative algorithms; Partitioning algorithms; Performance analysis; Processor scheduling; Recursive estimation; Registers; VLIW;
fLanguage
English
Publisher
ieee
Conference_Titel
Microarchitecture, 1998. MICRO-31. Proceedings. 31st Annual ACM/IEEE International Symposium on
Conference_Location
Dallas, TX
ISSN
1072-4451
Print_ISBN
0-8186-8609-X
Type
conf
DOI
10.1109/MICRO.1998.742792
Filename
742792
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