Title :
Write amplification due to ECC on flash memory or leave those bit errors alone
Author :
Moon, Sangwhan ; Reddy, A. L Narasimha
Author_Institution :
Texas A&M Univ., College Station, TX, USA
Abstract :
While flash memory is receiving significant attention because of many attractive properties, concerns about write endurance delay the wider deployment of the flash memory. This paper analyzes the effectiveness of protection schemes designed for flash memory, such as ECC and scrubbing. The bit error rate of flash memory is a function of the number of program-erase cycles the cell has gone through, making the reliability dependent on time and workload. Moreover, some of the protection schemes require additional write operations, which degrade flash memory´s reliability. These issues make it more complex to reveal the relationship between the protection schemes and flash memory´s lifetime. In this paper, a Markov model based analysis of the protection schemes is presented. Our model considers the time varying reliability of flash memory as well as write amplification of various protection schemes such as ECC. Our study shows that write amplification from these various sources can significantly affect the benefits of these schemes in improving the lifetime. Based on the results from our analysis, we propose that bit errors within a page be left uncorrected until a threshold of errors are accumulated. We show that such an approach can significantly improve lifetimes by up to 40%.
Keywords :
Markov processes; error correction codes; flash memories; ECC; Markov model based analysis; bit error rate; error correcting code; flash memory; program-erase cycles; protection schemes; scrubbing; Ash; Bit error rate; Error correction codes; Error probability; Markov processes; Memory management; Reliability;
Conference_Titel :
Mass Storage Systems and Technologies (MSST), 2012 IEEE 28th Symposium on
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4673-1745-0
Electronic_ISBN :
2160-195X
DOI :
10.1109/MSST.2012.6232375