• DocumentCode
    2518815
  • Title

    Thermal Investigation for Multiple Chips 3D Packages

  • Author

    Chen, M.W. ; Chen, Eason ; Lai, Jeng-Yuan ; Wang, Yu-Po

  • Author_Institution
    Siliconware Precision Ind. Co. Ltd., Taichung, Taiwan
  • fYear
    2008
  • fDate
    9-12 Dec. 2008
  • Firstpage
    559
  • Lastpage
    564
  • Abstract
    With the need for more functionality, smaller form factor and lower cost products in electronic industry, the various structures of multi-chip 3D packages have become more and more popular. Compared to single die package, the multiple chips package can accommodate with multi-functional devices and increase the memory capacity with. in. same footprints as a single die package. However, such high performance structures also result in high power consumption, which becomes a primary challenge for heat management. In this paper, we provide a thermal evaluation for multiple chips packages were considered for different package structures, airflow rate, and PCB design by using computational fluid dynamics (CFD) modeling technique. There are three different package structures that mounted with four dies as shown in Figural were discussed in this paper including No lead Bump array QFN package (NBA-QFN), Exposed pad Low profile Quad Flat package (E-pad LQFP) and Thin Fine pitch Ball Grid Array package (TFBGA). Moreover, thermal performance for multiple chips packages with real application setting of external heat sink was also investigated. Finally, NBA-QFN package with multi-chip module thermal characteristic experiments was also conducted and had good agreement with simulation results.
  • Keywords
    ball grid arrays; chip scale packaging; computational fluid dynamics; fine-pitch technology; heat sinks; printed circuit design; PCB design; airflow rate; computational fluid dynamics; exposed pad low profile quad flat package; external heat sink; multiple chip 3D packages; no lead bump array QFN package; thin fine pitch ball grid array package; Computational fluid dynamics; Cost function; Electronic packaging thermal management; Electronics industry; Electronics packaging; Energy consumption; Energy management; Heat sinks; Lead; Thermal conductivity;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Packaging Technology Conference, 2008. EPTC 2008. 10th
  • Conference_Location
    Singapore
  • Print_ISBN
    978-1-4244-2117-6
  • Electronic_ISBN
    978-1-4244-2118-3
  • Type

    conf

  • DOI
    10.1109/EPTC.2008.4763492
  • Filename
    4763492