A 22-GHz low-power frequency synthesizer in 0.18-um CMOS

Author

Ching-Yuan Yang ; Jia-Jiun Lin ; Chih-Hsiang Chang

Author_Institution

Dept. of Electr. Eng., Nat. Chung Hsing Univ., Taichung, Taiwan

fYear

2012

fDate

2-5 Oct. 2012

Firstpage

118

Lastpage

121

Abstract

The paper presents the design and realization of frequency synthesizer based on a phase-locked loop together with frequency-doubling and fractional phase-rotating techniques. To achieve lower power design, a current-reused technique is employed on the combiner of quadrature voltage-controlled oscillator and frequency doubler and the other combiner of injection-lock frequency divider and phase rotator. The synthesizer provides the tuning range of 21.2 to 22.4 GHz and dissipates 28 mW. The measured phase noise is -106.7 dBc/Hz from 1-MHz offset.

Keywords

CMOS integrated circuits; MMIC frequency convertors; MMIC oscillators; field effect MMIC; frequency dividers; frequency multipliers; frequency synthesizers; low-power electronics; phase locked loops; phase noise; voltage-controlled oscillators; CMOS technology; current-reused technique; fractional phase rotating technique; frequency 21.2 GHz to 22.4 GHz; frequency doubling; injection-lock frequency divider; low-power frequency synthesizer; phase noise; phase rotator; phase-locked loop; power 28 mW; quadrature voltage-controlled oscillator; size 0.18 mum; CMOS integrated circuits; Frequency conversion; Frequency measurement; Frequency synthesizers; Phase frequency detector; Phase noise;

fLanguage

English

Publisher

ieee

Conference_Titel

Communications and Information Technologies (ISCIT), 2012 International Symposium on

Conference_Location

Gold Coast, QLD

Print_ISBN

978-1-4673-1156-4

Electronic_ISBN

978-1-4673-1155-7

Type

conf

DOI

10.1109/ISCIT.2012.6380873

Filename

6380873