Analysis of the measurement inaccuracy introduced by a synchronous sampling clock generator

The behavior of a synchronous sampling clock generator in the presence of noise is examined. A theoretical analysis is performed to evaluate the effects of noise on the phase jitter of the output signal of the sampling clock generator and on the accuracy of digital measurements performed on signals sampled employing the generated sampling clock. The results of this analysis show that a careful design of the sampling clock generator can reduce the sensitivity to the external noise and that under stable operating conditions, only the remaining internal noise can affect the measurement accuracy. Some experimental tests were also performed to support the results of this analysis. A simple and synchronous sampling clock generator was tested under different signal-to-noise ratios. The phase jitter of the output signal was found to be very low and the errors in subsequent fast Fourier transform measurement were found to be comparable with the theoretical bound represented by the Cramer-Rao bound, even for severe SNR values