Title :
Joint Reliability of Double-Side Packaged SiC Power Devices to a DBC Substrate with High Temperature Solders
Author :
Lang, Fengqun ; Hayashi, Yusuke ; Nakagawa, Hiroshi ; Aoyagi, Masahiro ; Ohashi, Hiromichi
Author_Institution :
Nat. Inst. of Adv. Ind. Sci. & Technol., Tsukuba
Abstract :
The tendency of high efficiency and high power density of power inverters needs three-dimensional (3-D) packaging techniques for power module packaging. In a 3-D power device packaging, it is necessary to bond electrodes to a substrate or other chips by solders. However, the "upper" electrodes of most power devices are metalized with Al and are very difficult to be directly bonded to a substrate with solder due to the existence of naturally formed Al oxide film on Al pads. As a result, it is very difficult to realize 3-D packaging of Al-metalized power devices. To solve this problem, we have developed a novel method for three- dimensionally packaging Al-metalized SiC power chips using Au stud bumping techniques on an Al-metalized electrode of a power chip and a vacuum reflow process. In this paper, we report the joint reliability of Au-stud-bumped Al electrodes of SiC power devices bonded to a DBC substrate with Au-20Sn, Pb-5Sn solder and Ag paste. All of the three solders successfully bonded the Au-stud bumped Al electrode of a SiC-SBD power chip to a AlN/Cu/Ni(Au) direct bonded copper (DBC) substrate. The mechanical and electrical properties of the bonded samples were evaluated before and after high temperature storage. The Au-20Sn bonded Au-stud-bumped Al electrode and die side exhibited the highest die shear strength and very little change in electrical resistance among these solders. The Pb-lOSn bonded Au-stud-bumped Al electrode exhibited a decrease in the die shear strength and an increase in electrical resistance. The Ag paste bonded die side of SiC chips also exhibited an increasing tendency in electrical resistance during high temperature aging. The Au-20Sn double-side bonded SiC chips exhibited the best high temperature reliability.
Keywords :
electrical resistivity; electronics packaging; power semiconductor devices; semiconductor device reliability; shear strength; silicon compounds; solders; wide band gap semiconductors; 3-D packaging; Cu; SiC-Al-AuSn-PbSn-Ag-AlN-Cu-NiAu; direct bonded copper substrate; double-side packaged power devices; electrical properties; electrical resistance; high temperature solders; joint reliability; mechanical properties; shear strength; Bonding; Copper; Electric resistance; Electrodes; Inverters; Multichip modules; Packaging; Silicon carbide; Substrates; Temperature;
Conference_Titel :
Electronics Packaging Technology Conference, 2008. EPTC 2008. 10th
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-2117-6
Electronic_ISBN :
978-1-4244-2118-3
DOI :
10.1109/EPTC.2008.4763544