Title :
Getting to the bottom of deep submicron
Author :
Sylvester, D. ; Keutzer, K.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Abstract :
We take a fresh look at the problems posed by deep submicron (DSM) geometries and re-open the investigation into how DSM effects are most likely to affect future design methodologies. We describe a comprehensive approach to accurately characterize the device and interconnect characteristics of present and future process generations. This approach results in the generation of a representative strawman technology that is used in conjunction with analytical model simulation tools and empirical design data to obtain a realistic picture of the future of circuit design. We then proceed to quantify the precise impact of interconnect, including delay degradation due to noise, on high performance ASIC designs. Having determined the role of interconnect in performance, we then reconsider the impact of future processes on ASIC design methodology.
Keywords :
application specific integrated circuits; circuit CAD; interconnections; ASIC design methodology; DSM effects; analytical model simulation tools; circuit design; deep submicron geometries; delay degradation; empirical design data; future design methodologies; future processes; high performance ASIC designs; interconnect characteristics; process generations; representative strawman technology; Analytical models; Application specific integrated circuits; Character generation; Circuit simulation; Circuit synthesis; Degradation; Delay; Design methodology; Geometry; Integrated circuit interconnections;
Conference_Titel :
Computer-Aided Design, 1998. ICCAD 98. Digest of Technical Papers. 1998 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA, USA
Print_ISBN :
1-58113-008-2
DOI :
10.1109/ICCAD.1998.144268
