• DocumentCode
    2520175
  • Title

    The Acadia vision processor

  • Author

    Van der Wal, Gooitzen ; Hansen, Mike ; Piacentino, Mike

  • Author_Institution
    Sarnoff Corp., USA
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    31
  • Lastpage
    40
  • Abstract
    Presented is a new 80 GOPS video-processing chip capable of performing video rate vision applications. These applications include real-time video stabilization, mosaicking, video fusion, motion-stereo and video enhancement. The new vision chip, code-named Acadia, is the result of over 15 years of research and development by Sarnoff in the areas of multi-resolution pyramid-based vision processing and efficient computational architectures. The Acadia chip represents the third generation of ASIC technology developed by Sarnoff, and incorporates the processing functions found in Sarnoff´s earlier PYR-1 and PYR-2 pyramid processing chips as well as numerous other functions found in Sarnoff-developed video processing systems, including the PVT200. A demonstration board is being implemented and includes two video decoders, a video encoder and a PCI interface
  • Keywords
    computer architecture; computer vision; digital signal processing chips; 80 GOPS; Acadia vision processor; mosaicking; motion-stereo; pyramid-based vision; real-time video stabilization; video enhancement; video fusion; video rate vision; video-processing chip; vision chip; Application specific integrated circuits; Computer architecture; Control systems; Filters; Image fusion; Layout; Motion analysis; Real time systems; Research and development; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Architectures for Machine Perception, 2000. Proceedings. Fifth IEEE International Workshop on
  • Conference_Location
    Padova
  • Print_ISBN
    0-7695-0740-9
  • Type

    conf

  • DOI
    10.1109/CAMP.2000.875956
  • Filename
    875956