Title : 
High speed target tracking vision chip
         
        
            Author : 
Komuro, Takashi ; Ishii, Idaku ; Ishikawa, Masatoshi ; Yoshida, Atsushi
         
        
            Author_Institution : 
Dept. of Math. Eng. & Inf. Phys., Tokyo Univ., Japan
         
        
        
        
        
        
            Abstract : 
This paper describes a new vision chip architecture for high speed target tracking. The system speed and pixel size improved by hardware implementation of a special algorithm which utilizes a property of high speed vision. Using an asynchronous and bit-serial propagation method, global moments of the image are calculated at high speed and with small circuits. Based on the new architecture a 64×64 pixel prototype chip has been developed
         
        
            Keywords : 
computer architecture; computer vision; digital signal processing chips; target tracking; chip architecture; high speed target tracking; target tracking; vision chip; Circuit testing; Feedback; Parallel processing; Physics; Prototypes; Retina; Robot control; Sensor arrays; Target tracking; World Wide Web;
         
        
        
        
            Conference_Titel : 
Computer Architectures for Machine Perception, 2000. Proceedings. Fifth IEEE International Workshop on
         
        
            Conference_Location : 
Padova
         
        
            Print_ISBN : 
0-7695-0740-9
         
        
        
            DOI : 
10.1109/CAMP.2000.875958