Framework of a scalable delay-insensitive asynchronous platform enabling heterogeneous concurrency

Parallel architecture of asynchronous circuits has great potential in improving throughput while reducing energy consumption. This paper presents a parallel platform designed using delay-insensitive asynchronous logic. Heterogeneous data processing units as well as datapath control logic are integrated in the platform. All these units share the common data I/O and external handshaking control channels. Asynchronous arbiters are incorporated to make the cores´ data requests mutually exclusive. The highly-modular interface and delay-insensitivity allow the platform to be easily cascaded to construct large systems. Simulation results indicate the functional correctness of the heterogeneous platform as well as its cascaded structure.