DocumentCode :
2520375
Title :
Characterisation, modelling and design of bond-wire interconnects for chip-package co-design
Author :
Chandrasekhar, Arun ; Stoukatch, Serguei ; Brebels, Steven ; Balachandran, Jayaprakash ; Beyne, Eric ; De Raedt, Walter ; Nauwelaers, Bart ; Poddar, Anindya
Author_Institution :
IMEC, Leuven, Belgium
Volume :
1
fYear :
2003
fDate :
7-9 Oct. 2003
Firstpage :
301
Abstract :
This work is a comprehensive experimental investigation of chip to package wirebond interconnects for chip-package co-design. Wirebonds are interconnect bottlenecks in RF design, but are difficult to avoid due to their low cost and manufacturing case. We have shown measurements on wirebonds in coplanar configuration with different return paths and also the cross coupling. We have also extracted lumped and distributed models and demonstrate the excellent agreement with measurements at least up to 15GHz. We have proposed multi-wirebonds as a potential solution for better impedance matching. Different types of inductors with Q-factors of up to 100 have also been illustrated. We show influence of encapsulant on wirebonds and finally we also demonstrate a methodology to extract the time-domain response from S-parameters.
Keywords :
Q-factor; S-parameters; chip-on-board packaging; impedance matching; interconnections; lead bonding; multichip modules; time-domain analysis; 15 GHz; MCM-D thin film on glass; Q-factors; RF design; S-parameters; chip to board interconnect; chip to package wirebond interconnects; chip-package codesign; coplanar configuration; distributed models; encapsulant influence; impedance matching; inductors; lumped models; time-domain response; Bonding; Costs; Impedance matching; Inductors; Manufacturing; Packaging; Q factor; Radio frequency; Semiconductor device measurement; Time domain analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Conference, 2003. 33rd European
Print_ISBN :
1-58053-834-7
Type :
conf
DOI :
10.1109/EUMC.2003.1262279
Filename :
1262279
Link To Document :
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